systemc

10.18: news.adda/systemc

Open SystemC Initiative (OSCI) site

. why [systemC suite]?

it helps install openware for dev'ers of systemC

the new c++ extension lang for dev'ing systems on a chip,

IEEE Std 1666TM-2005

SystemC is an ANSI standard C++ class library

for system and hardware design

for use by designers and architects who need to address

complex systems that are a hybrid between

hardware and software .

. SystemC provides a mechanism for managing this complexity

with its facility for

modeling hardware and software together

at multiple levels of abstraction.

This capability is not available in

traditional hardware description languages.

. Users are encouraged to check this for errata periodically.

downloading:

TLM_2_0_LRM.pdf TLM-2.0 Reference Manual

systemc-2.2.0.tgz Core SystemC Language and Examples, Release 2.2

TLM2_Whitepaper.pdf TLM-2 Whitepaper

web:

tlm (transaction level modeling)

-- this refers to high-level hardware simulation

vs the rtl (register transfer level) modeling done by vhdl .

. tlm is a much quicker simulator than rtl mode,

but may not give needed info about hardware timing subtleties .

motivation

systemC is replacing the specially designed HDL's

like Verilog and VHDL in many situations.

This does not mean that these HDL's are obsolete now,

instead, systemC supports a new approach to design a system.

The systemC born because of the necessities of the current electronic industry:

Previously, the C (or C++) was used to write the software part of the design.

For hardware part any of the existing HDL's were used to design the hardware.

It was very difficult to setup a testbench which is common for both,

since they are entirely different languages.

The introduction of systemC solved many of these problems.